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MUNICH, Germany--(BUSINESS WIRE)--March 13, 2001-- Broadening its ASIC verification synthesis offering, Synplicity Inc. (Nasdaq:SYNP), a leading supplier of software for the design and verification of semiconductors for Internet infrastructure, today introduced its Certify SC(TM) (Single Chip) software. A new member of Synplicity's Certify(TM) verification synthesis software family, the Certify SC software is the industry's first tool aimed at ASIC and intellectual property (IP) prototyping on a single FPGA and is available as an option to Synplicity's Synplify Pro(TM) software. Introducing new features targeted at ASIC conversion and debug access including integration with Xilinx® ChipScope(TM) debugging tools, the Certify SC software is designed to enable ASIC designers to either prototype IP or prototype portions of ASIC designs onto high-density FPGAs. Additionally with the Certify SC software, FPGA designers using Synplicity's Synplify Pro FPGA synthesis software now have the ability to easily insert debug logic into their designs.

``We constantly strive to meet our customer's demands while providing them with the best-in-class synthesis and verification products,'' said Andy Haines, vice president of marketing for Synplicity. ``With the advent of multi-million gate FPGAs and the increasing size and functionality of IP blocks, the ability to prototype significant portions of ASIC designs onto a large FPGA has become a reality. To meet our growing customer demand, we have created a solution intended to provide fast and effective prototyping and verification of IP on a single device with the development of the Certify SC software.''

First introduced in 1999, the Certify software is used by ASIC designers to prototype large ASIC designs by partitioning them across multiple FPGAs. With the rapid increase in FPGA capacity, technologies pioneered in the Certify software are now in demand by ASIC designers prototyping ASIC blocks or IP, as well as high-end FPGA customers. These customers require debug access due to the large gate count now possible in these leading-edge FPGAs and the ability to bring RTL code written for ASIC designs into FPGA implementations without time consuming modifications. As a result, Certify SC was developed to meet this growing demand for single-chip prototyping by adding debug access and ASIC conversion features to Synplicity's leading FPGA synthesis tool, Synplify Pro.

Increased Debug Functionality

``Synplicity's verification synthesis products have always provided our customers with best-in-class prototyping and debug technology,'' said Rich Sevcik, senior vice president, IP cores, services and software at Xilinx Inc. ``Now with single-chip prototyping, Synplicity broadens its potential customer base to include both designers prototyping IP blocks using a single FPGA and those doing ASIC conversion for final FPGA implementation. And, with support for the Xilinx ChipScope debug technology, the Certify SC software offers our mutual customers a complete IP prototyping and debug solution previously unavailable.''

When prototyping a large FPGA device, internal debug access is critical in order to determine functional problems. Although a designer has internal debug access within software by using a simulator, if the prototype is in hardware, there is no access to the internal nodes and a designer has no means of identifying a problem other than his or her intuition. The Certify SC software features capabilities designed to provide internal debug access without requiring an RTL code change or manual post-synthesis insertion.

A key feature of Certify SC software is tight integration with Xilinx ChipScope debugging tools. The Certify SC software enables designers to easily and graphically add ChipScope IP modules and connect them internally to the design at the RTL level without modifying the original RTL source code. This seamless integration is designed to let the designer concentrate on selecting the appropriate internal signals for debug access, while the Synplicity Certify SC and Xilinx ChipScope software work together to produce the appropriate FPGA design with debug access.

Additionally, previous versions of the Certify software contained simple probes that enabled a designer to select any internal net and drag it to an I/O pin. Although this feature provides automatic internal debug access, enabling designers to bring the internal signals out to the I/O without changes in the RTL or connectors, in I/O limited designs, pin usage must be conserved. With this problem in mind, the Certify simple probes feature has been enhanced in the Certify SC software with Certify Pin Multiplexing (CPM) of probes. The CPM of probes is designed to make it easier to select multiple probes and conserve the number of I/O pins being used, an increasing requirement for complex designs.

New Productivity-Specific Features in Certify SC

Synplicity believes that new features within the Certify SC software remove several of the traditional design hurdles that have prevented a designer from automatically bringing existing portions of an ASIC design -- whether it is an IP block or an entire ASIC design -- into a prototype implementation. The Certify SC software features a function designed to do gated-clocks conversion, whereby the tool recognizes gated clocks typically used in ASIC designs and provides automatic conversion to the clock enable mechanism used within an FPGA. This function is intended to yield a substantial improvement in prototype performance and cut days from the prototype development process. This capability is a key productivity feature that is offered only in the Certify and Certify SC software.

An additional productivity-specific feature in the Certify SC software is black-box extraction, enabling a designer to remove an IP block, memory block, or other logic from a design and drag its description into a black-box. Once the block is moved into the device, the Certify SC software is designed to automatically accommodate the IP block by making connections for the designer. This automated process eliminates the need for the designer to go back and change the ASIC RTL code for placement into an FPGA-based design.

Automation of ASIC Conversion

Increasingly, ASIC designers are tasked with using a part of a previous design or technology that is no longer produced, which presents several barriers that often require many days of manual effort in order to prototype the ASIC design. The Certify SC software is intended to enable the easy conversion of an ASIC design onto a single FPGA with new features that automate many of these laborious tasks. Among these are two features that automate the use of non-RTL code: DesignWare and .lib format files, two popular formats that are used in ASIC designs today. For example, many designs feature DesignWare blocks for adders, multipliers and counters. Previously, a designer had to manually create the RTL code to represent the adders, multipliers or counters for maximum optimization within an FPGA. The Certify SC software includes a DesignWare import feature that provides RTL instantiations of DesignWare blocks that is designed to automatically recognize the blocks when they are brought in at the RTL. Once the DesignWare blocks are recognized, a designer can proceed to optimize the block for the best fit into an FPGA architecture.

An additional problem that has hindered ASIC designers is the recognition of user-generated .lib format files. Most ASIC IP libraries are generated in a .lib format, however, these files also required manual conversion. To help designers overcome this barrier, the Certify SC software features an RTL converter that automatically reads the .lib format files and converts them into RTL, which are intended to assist a designer to quickly and easily optimize the design component.

Pricing and Availability

Synplicity intends to begin shipping the Certify SC software in the second quarter of 2001. Pricing for the Certify SC software will be $35,000 and will be available for Windows NT, Windows 2000 and UNIX (Solaris & HP) operating systems. Certify SC is sold as an option to the Synplify Pro synthesis software which starts at $19,000 (U.S.).

About the Certify Software Product Line

Leveraging Synplicity's core synthesis and partitioning technologies, the Certify verification synthesis products are enhanced to enable designers to create functional hardware prototypes of their design prior to ASIC synthesis. This approach enables higher performance and productivity than older gate-level partitioning approaches, along with support of critical technologies such as multi-chip optimizations, debug insertion, and ASIC conversion. EDN Magazine selected the Certify product as one of the Hot 100 Products of 2000. EDN Magazine editors reviewed thousands of products in dozens of categories before identifying the products chosen for the Hot 100 list.

About Synplicity

Synplicity, Inc. (Nasdaq:SYNP) is a leading provider of software products that enable the rapid and effective design and verification of semiconductors used in Internet infrastructure hardware and other electronic devices. The company leverages its innovative logic synthesis, physical synthesis and verification software solutions to improve performance and shorten development time for complex programmable logic devices, application specific integrated circuits (ASICs) and system-on-chip (SoC) integrated circuits. Synplicity's fast, easy-to-use, affordable products offer extremely high quality of results, support industry-standard design languages (VHDL and Verilog) and run on popular platforms (Windows 98/2000, Windows NT and UNIX). The company is located at 935 Stewart Drive, Sunnyvale, Calif. 94085. Telephone: 408/215-6000; Fax: 408/990-0290; E-Mail: info@synplicity.com.

The specific features, functionality and release timing of any new products or new versions of current products remain at the sole discretion of Synplicity, Inc., and Synplicity does not make any warranty as to when or if specific features, functionality or releases may occur.

Note to Editors: Synplicity is a registered trademark of Synplicity, Inc. Certify, Certify SC and Synplify Pro are trademarks of Synplicity, Inc. Xilinx is a registered trademark of Xilinx, Inc. ChipScope is a trademark of Xilinx, Inc. All other names mentioned herein are the trademarks or registered trademarks of their owners. SYB-091

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